Foundry independent IP company. Development and licensing on-chip ESD protection and custom/specialty Analog I/O’s and PHY’s.
On-chip ESD protection, custom/specialty I/O’s and PHY’s
Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. Our technology has been characterized on 11 foundries including advanced nodes at TSMC, UMC, GF, Samsung Foundry.
Out technology is used by more than 100 fabless customers, several IDM companies and the biggest semiconductor foundries. Sofics IP is used for design projects at 4 of the top-5 semiconductor companies, 6 out of the top-10. The technology has been integrated into more than 4500 IC designs since 2000.
Sint-Godelievestraat 32, 9880 Aalter, Belgium
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On-chip ESD protection for low voltage/advanced processes
TakeCharge® analog I/Os and on-chip ESD protection for low voltage CMOS from 0.25um down to 4nm; for high-speed, low-leakage, low-capacitance, low-noise, RF, analog, over- and undervoltage tolerance; often combined with beyond standard robustness requirements.
On-chip ESD protection for high voltage and BCD processes
PowerQubic® on-chip ESD and EOS protection devices for high voltage CMOS/BCD, typically 0.35um down to 0.18um and 5V to 50V; for automotive, industrial; mostly requiring high robustness for a combination of harsh ESD, EOS, LU and EMI specs.
Robust circuit solutions
PhyStar® robust circuit and interface solutions, including custom digital I/O’s, circuits that handle transient disturbances (e.g. to provide antenna clipping or POR), as well as automotive standard PHYs (e.g. a full LIN PHY with integrated ESD, EOS and EMC robustness).