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Koen verhaege

“Sofics is excited and honored to cooperate with TSMC. Our mission is to empower customers with advanced solutions and tools so they can independently perform successful ESD design, getting it right the first time, every time, regardless of the complexity of the process, application or innovation.”
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Tom Quan

“Sofics combines IP in an advanced design flow with calculation and integration tools, and customized services. They complement the diverse Design Services offered by our portfolio of DCA partners,”
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Koen Verhaege

“Our alliance with UMC means that customers will achieve shorter design cycles for proven specialty solutions optimized with advanced ESD protection. Together, Sarnoff and UMC can better meet the specialized needs of our customers by bringing cost efficient, higher-quality solutions to market much faster.”
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Ken Liou

“With the addition of  TakeCharge on-chip ESD protection design solutions to the UMC IP Alliance Program, UMC customers will have easy access to superior ESD design solutions from an industry wide  recognized leader in its field”
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Bram De Muer

“ICsense used our high-voltage-in-low-voltage expertise to achieve tolerances of -0.3V to 3.9V. This allows chips to communicate reliably under a wide range of start-up and power scenarios, with robust ESD protection”
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Peter Hughes

“We wanted true 3.3V signalling on our new baseband chip without the extra cost of 2.5V/3.3V masks. By integrating ESD protection with high-voltage capability, the Sofics/ICsense team gave us the ability to safely handle off-chip interfaces up to 3.6 volts with 1.8-volt internal transistors”
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