“On-chip ESD protection with Sofics equals higher robustness for your integrated circuits.”
ESD is responsible for many product failures in the electronics industry. Based on many reports, ”ESD losses are between half a billion to five billion dollars every year”. This means a lot of natural resources are wasted each year just because of lacking good enough ESD precautions. Sofics for more than 20 years is developing ESD solutions that result in avoiding extra costs due to product failure and saving our natural resources. Sofics ESD protections can enable higher performance, higher ESD robustness, reduce design time and costs. Our technology has been characterized on 11 foundries including advanced nodes of TSMC, UMC, GF, and Samsung Foundry. Since 2008, Sofics is the IP alliance partner of TSMC . Also, we recently joined the IFS Accelerator – IP Alliance program of Intel foundry as well. Sofics has three main product categories:
1-Take Charge: On-chip ESD protection for low voltage/advanced processes
TakeCharge® analog I/Os and on-chip ESD protection for low voltage CMOS from 0.25um down to 3nm; These ESD protection solutions can be used for high-speed, low-leakage, low-capacitance, low-noise, RF, analog, over- and under voltage tolerance; often combined with beyond standard ESD robustness requirements.
2-PowerQubic : the on-chip ESD protection for high voltage and BCD processes
PowerQubic® on-chip ESD and EOS protection devices are suitable for high voltage CMOS/BCD, typically 0.35um down to 0.18um for voltage ranges from 5V to 50V; PowerQubic® are used in a wide number applications which needed a ESD solution with a high holding voltage. Sofics designed on-chip ESD protection for several automotive, industrial applications where high robustness for a combination of harsh ESD, EOS, LU and EMI specs were part of the requirments.
3-Phystar: Robust circuit solutions
PhyStar® robust circuit and interface solutions, including custom digital I/O’s, circuits that handle transient disturbances (e.g. to provide antenna clipping or POR), as well as automotive standard PHYs (e.g. a full LIN PHY with integrated ESD, EOS and EMC robustness).
“ESD protections, Analog & Digital I/O’s, and PHY’s IPs are our expertise.”
Sofics Portfolio:
Our ESD protection solutions and IO related IPs are used by more than 100 fabless customers, several IDM companies and the biggest semiconductor foundries. Sofics IP is used for design projects at 4 of the top-5 semiconductor companies, 6 out of the top-10. The technology has been integrated into more than 4500 IC designs since 2000 and millions of silicon wafers.
Engineering office
Sint-Godelievestraat 32, 9880 Aalter, Belgium
Our spacious, inspiring and energy-neutral office in Aalter is the ideal workplace for all kind of ESD/ IO research and innovation.
Stay Connected: