SerDES Archives

Protecting die-2-die interfaces…

by Bart Keppens
Posted on April 14, 2023
in 2.5D and 3D hybrid integration, ESD protection, FinFET, SerDES

At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data center communication applications recently.

by Bart Keppens
Posted on August 9, 2022
in CMOS, DTSCR, ESD devices, ESD protection, FinFET, Local clamp, Low capacitance ESD, Optical communication, Paper, SCR, SerDES, SiGe BiCMOS, Silicon controlled rectifier, SOI, TakeCharge, Wired communication

Sofics' 2021 IEDS publication. Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.

by Bart Keppens
Posted on May 18, 2022
in Automotive, CMOS, dual diode, ESD protection, ESD protection approaches, Ethernet, FinFET, High ESD or IEC 61000-4-2 robustness, High speed interfaces, Local clamp, Low capacitance ESD, SerDES, TakeCharge, Wired communication

In the past most Electronic Control Units (ECU) used CAN and LIN interfaces to connect to sensors, actuators and each other. However, the newest applications need (much) faster communication options. Gigabit automotive ethernet is pushed by many in the industry as the perfect solution. With its local ESD clamp approach, Sofics provides the best solution[...]

by 32bartkeppens
Posted on February 15, 2022
in ESD devices, ESD protection, ESD protection approaches, FinFET, Local clamp, SCR, SerDES, Silicon controlled rectifier

Engineers developing semiconductor devices in the most advanced FinFET technology need improved ESD protection solutions. We demonstrate ESD protection solutions based on proprietary Silicon Controlled Rectifiers verified on the Samsung Foundry 8nm and 4nm FinFET process.

by 32bartkeppens
Posted on January 10, 2022
in 2.5D and 3D hybrid integration, ESD protection, ESD protection approaches, FinFET, SerDES, Silicon controlled rectifier

Semiconductor companies using 2.5D and 3D hybrid integration need to consider Electrostatic Discharge (ESD) protection early in the design, even for die-2-die interfaces that remain inside the package. There are several challenges but also opportunities. The use of a local ESD protection clamp at the TSV offers more robustness, higher performance, more flexibility, all in[...]

by 32bartkeppens
Posted on September 16, 2021
in ESD devices, ESD protection, ESD protection approaches, FinFET, Local clamp, Low capacitance ESD, SerDES, Silicon controlled rectifier, SOI

Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.

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Protecting die-2-die interfaces…

Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

Optimized on-chip ESD protection to enable high-speed Ethernet in cars.

Optimized ESD protection based on Silicon Controlled Rectifiers (SCR), verified on Samsung Foundry 4nm and 8nm FinFET processes

Optimized Local I/O ESD Protection in FinFET Technology for 2.5D and 3D hybrid integration

Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

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