Proven technology significantly reduces risk, time-to-market and overall cost
Belgium, September 26, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog I/O portfolio with solutions for TSMC’s N5 process technology. The cells enable high speed and high frequency interfaces.
Today many communication channels, be it wired, wireless or optical, work at very high frequencies. The main figure-of-merit for ESD protection for these cases is a low parasitic capacitance for a given ESD level. Both the junction as well as the metal capacitance needs to be taken into account. Sofics engineers have consistently delivered ESD protection with ultra-low capacitance for these interfaces.
“Our specialized interface protection solutions enable product reliability and manufacturing yield for the leading-edge applications in the world’s most advanced processes”, said Koen Verhaege, CEO of Sofics. “After releasing silicon proven solutions for 16nm, 12nm and 7nm processes, we now have pre-silicon solutions available on TSMC N5 process technology.”
“Whether it is 0.18um CMOS or 5nm FinFET does not really matter. Fabless companies will always benefit from a shorter timeline and a lower cost combined with the confidence of a working solution”.
TakeCharge cells as well as robust I/O solutions are readily available from Sofics. One can find more information about FinFET ESD and Analog I/O solutions from Sofics on the Website .
Sofics supports your next N5 design
- ESD protection in N5
- ESD protection for 5nm is challenging. Find out how Sofics technology can provide a competitive advantage.
- Let's discuss your specific requirements
- Schedule a conference call or meet us at one of the next events to discuss your IC project. Contact us