• Analog IO’s, ESD for TSMC N16, N12 and N7 technology

  • Press release: Sofics Analog I/O’s and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

First eight customers integrate Sofics ESD protection in their high-speed SerDes

Belgium, October 28, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that its TakeCharge® Electrostatic Discharge (ESD) portfolio is silicon proven on TSMC’s advanced 16nm, 12nm and 7nm FinFET processes. More than 80 fabless companies use Sofics solutions to enable higher performance, higher robustness and to reduce design time and cost while designing SoC’s.

Interface ESD protection in FinFET technology is challenging. FinFET circuits are very sensitive to ESD stress, but the traditional ESD concepts are not effective anymore. “We have invested in bringing our proprietary ESD portfolio to the most advanced FinFET technology,” said Koen Verhaege, CEO of Sofics.

“SoC designers need custom analog I/O or ESD cells for some applications including high-speed or wireless interfaces, low power or high voltage tolerant pads. However, designing custom ESD cells is quite cumbersome in such advanced technology in terms of the high cost and potential risk.”

“Sofics has silicon proven solutions, reducing time-to-market and optimizing customer profit by mitigating the risk, expenses and delays of ESD re-design. We are proud that 8 fabless licensees are using our IP and expertise to design their FinFET SoCs.”

TakeCharge cells as well as robust I/O solutions are readily available from Sofics. One can find more information about FinFET ESD and Analog I/O solutions from Sofics on the Website .




Sofics supports your next FinFET design


  • ESD protection in FinFET technology
  • ESD protection in advanced FinFET processes is challenging. Find out how Sofics technology can provide a competitive advantage.
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