Overall robustness and cost optimization can be driven further by a higher level of solution integration. Sofics’ design team is ready to enhance the functionality of IP blocks with diverse and/or aggressive ESD/EMC/EOS requirements.
In one example, a set of I/O’s with increased HBM performance (4 kV HBM) were created. This allowed the customer to focus on their core circuitry, while Sofics designed the pad ring, allowing a shorter design time for the overall product.
The I/O library contained digital and several analog I/O’s, including a high voltage pad – with tolerance for high positive and negative voltages (upto +-6V in a 2.5V domain). Also included was the power ESD power protection, busses and filler cells.
The fact that Sofics could act as a one-stop-shop by delivering the entire robust pad ring removed much of the integration overhead, and lowered overall costs significantly.
One-stop shop for higher integrated on-chip robustness – Sofics is your partner
Mask cost reduction
As in all Sofics' solutions, we strive for a minimal mask set to meet all requirements. In one example, we delivered digital IO's for 1.8V-3.6V domain using 5V transistors - as was the customers request
Minimum mask set – regularly achieved