Mask cost reduction
Nowhere the task of selecting the optimal, minimal mask set is more challenging than in BCD processes. Often a large variety of options are available. So far, Sofics always succeeded in creating protection using only the masks available for the functional elements of the IC.
Minimum mask set – regularly achieved
Speed up time-to-market
Designing ESD protection can be very time consuming: often at least one silicon run is required, often setting back the IC design for a couple of months. Sofics has a wide range of solutions, for a wide range of applications, silicon proven in a wide range of processes, readily available at your fingertips.
Less than 1 month from first contact to contract delivery of first time right solutions – achieved