Mask cost reduction
It’s at the core of Sofics’ philosophy that process technologies are designed for IC performance, not for ESD protection. Therefore, we work only with the masks required for the performance of the IC. Layers such as silicide block or DeepNwell are used only if the product requires them for other performance reasons.
Sofics designs do not need an ESD implant
Speed up time-to-market
Designing ESD protection can be very time consuming: often at least one silicon run is required, often setting back the IC design for a couple of months. Sofics has a wide range of solutions, for a wide range of applications, silicon proven in a wide range of processes, readily available at your fingertips.
Less than 1 month from first contact to contract delivery of first time right solutions – achieved