- Actel (now MicroSemi)state-of-the-art ESD protection'first time right' design2008: Actel Licenses TakeCharge solutions
- Advanced Bionics
- Aisin
- Altera (now Intel)effectively manage both ESD protection and IO area2004: TakeCharge Design Approach Delivers Chip I/O Size Reduction for Altera FPGAs
- Altis
- AMIS (now ON Semiconductor)Specialized ESD design solutionsEasy-to-use, easy-to-integrateBringing products to customers quickly and cost effectively2007: AMI Semiconductor Medical Business Unit Implements TakeCharge ESD
- Analog DevicesWe need strong, sophisticated ESD protection for 60V devices without compromising the mixed signal performance2012: Analog Devices Selects Sofics® to Develop On-Chip ESD Protection for 60V Products
- Analogix
- Ansem
- Anvo-systemsboost the robustness of our ESD/EOS protection without making extensive changes to our design masksSofics optimized our product in less than two weeksEverything worked perfectlywe found no failure far beyond the required maximum stress voltage2012: Sofics® ESDdoctor® Debugging Enables Maximum Stress Voltage with No Failure on Anvo-Systems Non-Volatile SRAM Design
- Aptina (now ON semiconductor)
- ArquimeaESDdoctor program gives access to the expertise and because they routinely work in multiple processes.ESDdoctor makes economic sense, reducing risk and saving time and money.2012: Arquimea Ingeniería Selects ESDdoctor® Debugging from Sofics to Test Device Fitness for Space Use, Design ESD Protection
- Astrium
- Avago
- CamSemi (now Power Integrations)
- Cern
- Cissoid
- Creative Chips
- CSR (now Qualcomm)
- Decawave
- Displaylink
- Disruptive Technologies
- Edgewater
- Energy Micro (now Silicon Labs)Increase our confidence to exceed customer's specialized requirements2008: Low Threshold Consulting And TLP/HBM Testing services
- Enphase
- eSiliconSofics delivered it in just two weeksSofics' PowerQubic technology offered a great solutionPowerQubic protects a 15V interface on a 0.18um high-voltage LDMOS chip2012: Sofics PowerQubic Technology Used by eSilicon to Protect High-Voltage Solar Panel IC from Electrical Overstress
- Eqcologic (now Microchip)
- Etopus
- Fresco Microchip (now Spectra7)
- Fujitsu (now SocioNext)Fujitsu selected TakeCharge to provide customers with highly reliable high-performance products2006: 65nm CMOS TakeCharge ESD Solution licensed to Fujitsu
- Gennum (now Semtech)
- Geo Semiconductor
- Global Unichip Corporation
- HiLight Semiconductor
- Himax
- Icera (now Nvidia)true 3.3V signaling without the extra cost of 2.5V/3.3V maskssafely handle off-chip interfaces up to 3.6 volts with 1.8-volt internal transistorsThe design worked right the first time2011: Sofics, ICsense Merge ESD and I/O Technologies, Deliver 3.3V Signalling on Icera’s 40nm, 1.8V I/O Baseband Chip
- ICSense
- Idex
- IDT
- Infineon
- Inphi
- Inside SecureMeasurement data to convince our customer of the IC ESD performance2008: Low Threshold Consulting And TLP/HBM Testing services
- Intersil
- Lantiq (now Intel)
- LAPIS Semiconductor (previously OKI Semiconductor)Substantial added value for Oki and its customers2005: OKI Implements TakeCharge On-Chip ESD Protection In High-Voltage ICs
- Lime Microsystems
- Luxtera
- M4S (now Huawei)
- Mapper
- Melexis
- Microchip
- Microsemi
- Nanotech (now Semtech)
- Netlogic (now Broadcom)
- NJRSmaller ICs can help LCD display manufacturers meet the cost pressures they face.breakthrough IC design just 8 months after we implemented the new technology, with no redesigns required2002: New Japan Radio Achieves Significantly Smaller Die Sizes For LCD Driver ICs With New Design Technology
- Nordic Semiconductor
- Ntrig (now Microsoft)
- NvidiaInterface with legacy components in smartphones and tablets, such as SIM cards and memory cards.Sofics and ICsense came up with a solution that works at high voltages and provides good ESD protection.Enables off-chip interfaces (in 40nm and 28nm) of up to 3.6 volts.2012 press release with Nvidia and ICsense
- ON Semiconductor
- PanasonicTakeCharge technology can reduce the capacitance of the input and output (I/O) pins of HV-CMOS IC's.2004: Sarnoff Licenses TakeCharge ESD Design Solution IP To Matsushita
- PMC-Sierra (now Microsemi)
- R2 semiconductor
- RedMere (now Spectra7)Truly demonstrated the ease-of-use and scalability of their solutionsHDMI: 8kV HBM without compromising the 3.4Gbps data channel2008: RedMere Technology Implements TakeCharge 8kV-HBM ESD Protection Solution for HDMI application
- RenesasThe TakeCharge® ESD protection technology will enable the design of optimized ESD protection circuitry in a short period It provides a high level of ESD protection in a smaller surface area, which allows the development of smaller chips. Finally, it has low parasitic capacitance, making it ideal for use in high-speed applications. 2004: Renesas Technology to Introduce TakeCharge ESD Protection Technology
- RicohRicoh is committed to delivering high-performance, cost-effective products to our customers. We are reinforcing that commitment by adding TakeCharge technology to our extensive IC design resources.2004: Ricoh Will Use TakeCharge Design Approach In Analog CMOS Process Families
- Rockley Photonics
- Rohm
- RUAGESDdoctor gives clients access to our full range of expertise in identifying, diagnosing, and solving ESD and EOS (electrical overstress) problems quickly and definitively2012: Sofics ESDdoctor Debugging Improves ESD Protection on Rad-Hard Ics
- Seiko EpsonFirst-time-rightNew ICs with improved capabilities even faster than beforeEpson achieved such great results with TakeCharge that we decided to extend its use to our foundry customersproducts to market cheaper and faster2006: Epson Extends Sarnoff's TakeCharge ESD Solution To Its Customers
2005: Epson Licenses Sarnoff's TakeCharge ESD Design IP For High-Voltage Driver ICs Used In LCD Panels
- Sensirion
- Silicon Image (now Lattice semiconductor)
- Sony
- Sharp
- ST
- StarchipSofics provided a solution that worked perfectly the first timeNo need for re-spins, no ESD masks or other process extrasMinimized our development time and wafer costs2011: StarChip achieves first-time-right ESD performance in SIM/Smartcard IC with Sofics TakeCharge Technology
- TES Electronic Solutions
- Thine
- ToshibaConsistent success in designing more compact, higher-performance ESD protectionCollaborate for future processes such as 45nm and 32nmTakeCharge is our standard choice solution for ESD protection.Reuse of TakeCharge IP in Toshiba's 180nm to 65nm ASIC products has consistently resulted in robust CDM, HBM and MM performance.2008: Sarnoff Expands License in ESD Solution for Toshiba
2004: Toshiba Will Apply Sarnoff's TakeCharge IC Design Approach To Chip Processes Down To 65 Nanometer
- TowerJazzConsistently been a reliable and expert ESD protection IP partner to the semiconductor industryThe natural choice as our partner for these demanding applications.2007: Tower Semiconductor licenses 20kV HBM ESD protection from Sarnoff
- TSMCSofics combines IP with calculation and integration tools, and customized servicescomplement the diverse Design Services offered by our DCA partnersReuse of TakeCharge IP in Toshiba's 180nm to 65nm ASIC products has consistently resulted in robust CDM, HBM and MM performance.2008: Sarnoff Europe joins the TSMC Design Center Alliance with its ESD Design portfolio
2010: TSMC Licenses PowerQubic™ Technology from Sofics Protects High-Voltage ICs against ESD/EOS, Latch-up
- Xaar
- ZMDI (now IDT)PowerQubic clamps were superior in the EMC test, as well as in parameters such as meeting flexible clamping voltage specifications.We selected Sofics to provide ESD/EOS protection for a new line of 0.18um devicesmeet our specifications, at a lower cost than building the clamps from scratch 2013: ZMDI Licenses Sofics® PowerQubic® ESD Clamps to Meet Automotive EMC Requirements on 0.18um 24V Chips
