• PHYSTAR

  • Predevelopped PHY's

  • Custom developped PHY's

  • Phy sub-circuits

  • Sofics' development or in collaboration with design partner

  • Physical PHY

  • Compliant to applicable standards

  • ESD, EMC, EOS.... robust

  • Simulated over all corners and temperatures

  • Full gds delivered


  • Reduces excess voltage

  • Selectable range (enable pin)

  • Other ranges possible

  • For differential pins or pin to ground

  • Low standby power

  • Applications

  • Antenna pins

  • IoT

  • NFC

  • Product proven

  • TSMC 55nm

  • contact us for other process nodes


  • Higher voltage rated IO's
    for advanced processes

  • 3.0V with 1.8V transistors

  • Product proven in TSMC 40nm and 28nm

  • in collaboration with ICSense

  • Digital IO's

  • Higher ESD rating - special request

  • contact us for more information


  • Digital I/O Libraries in 130nm

  • Silicon proven in TSMC BCD+ and GF SOI

  • More info