Thalia Design Automation partners with Sofics to enhance offering for analog circuit and IP reuse
Partnership enhances market-leading Technology Analyzer with robust hardened I/Os and ESD protection options
Cologne, Germany, 16 June 2021 – Thalia Design Automation Ltd., provider of analog and mixed-signal circuit IP reuse platform, today announced a new partnership with Sofics, a leading provider of analog I/Os, specialty digital I/Os and ESD protection.
Thalia’s Technology Analyzer, part of its AMALIA platform, helps major IP houses and integrated circuit design firms determine whether or not IP is fit for purpose or suitable for cost-effective migration. This partnership means Sofics’ specialist IP portfolio will now be included in the recommended target technology candidates.
“Adding Sofics’ ESD protection and other I/Os into the target options will enable solutions to be found and implemented much more rapidly.”Sowmyan Rajagopalan, Thalia Design Automation CEO
“This announcement is about the coming together of two market-leading solutions,” said Sowmyan Rajagopalan, Thalia Design Automation CEO. “This latest iteration of our Technology Analyzer uses machine-learning to rapidly compare the source and target process technologies, enabling business case and commercial modelling to be undertaken for our clients. They are then able to assess migration value before committing resource. Adding Sofics’ ESD protection and other I/Os into the target options will enable solutions to be found and implemented much more rapidly.”
“IP houses want to optimize the value of existing assets and extend portfolios through IP reuse,” said Koen Verhaege, CEO of Sofics. “Collectively, this is a solution that mitigates risk for customers when transitioning to new technology nodes. Sofics’ global reach means that we can bring a world-class technology solution to IP and IC firms.”
The AMALIA Technology Analyzer is an intuitive solution that addresses a comprehensive array of first and second order effects including FT, gm/id, Vdsat, Vt mismatches, corners, Monte Carlo mismatch impact and many others. The software integrates into several EDA design frameworks and can be customized to specific design flows.
Sofics leading I/O and ESD foundry independent IPs are adaptable to various technologies like high & low voltage, BCD, CMOS, SOI and FinFET. More than 100 fabless companies use Sofics’ solutions to enable higher performance, higher robustness while reducing design time and cost of SoC design.