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Naoyuki Shigyo

Toshiba has been using technology based on TakeCharge to protect its CMOS ICs from Human Body Model (HBM) and Machine Model (MM) ESD since 2000. The approach has been applied to high-volume 0.18μm, 0.13μm, and 90nm products.
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Naoyuki Shigyo

“System manufacturers are increasingly asking IC suppliers for CDM-protected devices. Based on our previous success with TakeCharge CDM protection solution will help us meet that challenge and further solidify Toshiba’s competitive position.”
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Koen verhaege

“Sofics is excited and honored to cooperate with TSMC. Our mission is to empower customers with advanced solutions and tools so they can independently perform successful ESD design, getting it right the first time, every time, regardless of the complexity of the process, application or innovation.”
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Tom Quan

“Sofics combines IP in an advanced design flow with calculation and integration tools, and customized services. They complement the diverse Design Services offered by our portfolio of DCA partners,”
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Koen Verhaege

“Our alliance with UMC means that customers will achieve shorter design cycles for proven specialty solutions optimized with advanced ESD protection. Together, Sarnoff and UMC can better meet the specialized needs of our customers by bringing cost efficient, higher-quality solutions to market much faster.”
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Ken Liou

“With the addition of  TakeCharge on-chip ESD protection design solutions to the UMC IP Alliance Program, UMC customers will have easy access to superior ESD design solutions from an industry wide  recognized leader in its field”
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