Christoph von Schierstädt
“Sofics’ ESD solutions together with Lantiq’s best-in-class Telecom products thus create a triple-win solution for Sofics, Lantiq and its customers”
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Christoph von Schierstädt
“With Sofics’ technology, Lantiq’s 130nm and 65nm HP products are more economic for a wide range of chip-hostile environments”
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Koen Verhaege
“Fabless companies will always benefit from a shorter timeline and a lower cost combined with the confidence of a working solution.”
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Koen Verhaege
“This defines one of our key roles in the IP eco-system: reducing time-to-market and optimizing customer profit by mitigating the risk, expenses and delays of ESD re-design”
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Koen Verhaege
“We have invested in bringing our proprietary ESD portfolio to the most advanced FinFET technology”
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Koen Verhaege
“Thanks to our close collaboration with TSMC in the IP alliance, Sofics was able to transfer its proprietary ESD portfolio to the most advanced 5nm process technology”
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Koen Verhaege
“To ensure good signal integrity, the MIPI PHY interfaces need to be paired with analog I/Os with low parasitic capacitance.”
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Ashraf Takla
“It is clear that IC designers that integrate Mixel’s MIPI IP can benefit from close collaboration between design teams at Mixel, Sofics, and Hardent”
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Bradley Howe
We chose TakeCharge® technology for our FPGA product families as part of Altera’s commitment to deliver high-performance, cost-effective programmable products to our customers. TakeCharge® has allowed us to effectively manage both ESD protection and IO area.
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Dr. Esmat Hamdy
The implementation of TakeCharge will allow us to effectively manage ESD protection while continuing to quickly and cost-effectively deliver our next-generation, low-power programmable products to market.
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