High ESD robustness

Sofics has supported many companies to enhance the robustness level of their ICs beyond the standard 2kV HBM.

Typical applications with higher ESD robustness include automotive electronics, medical devices. But also some consumer products need higher robustness like anything with USB, HDMI, DisplayPort interfaces. This includes higher robustness against HBM, MM or CDM. But in several cases the customer required on-chip robustness against system level ESD protection (IEC 61000-4-2).

Examples

Sofics ESD technology can easily scale to any ESD robustness level.

4kV and 6kV HBM for some medical applications

6kV HBM for timing controller applications

8kV HBM for HDMI/DisplayPort applications

6kV and 8kV IEC 61000-4-2 for automotive applications

The failure current of the proprietary SCR devices can be increased simply by making the device larger. The plot shows this linear behavior.

TLP	HBM	IEC 61000-4-2	Width x Height	Area
2 A	2.8 kV		35um x 22um	770 um²
3.6 A	5 kV		35um x 38um	1330 um²
7 A	10 kV		60um x 40um	2400 um²
		8 kV	120um x 54um	6480 um²
		12 kV	175um x 54um	9450 um²

Example robustness levels in TSMC 65nm CMOS technology for 1.2V Diode Triggered SCR devices of different layout sizes.

Mature CMOS (0.5um to 180nm)

Process	Pad	ESD robustness	Leakage
TSMC 180nm	1.8V I/O	>5 kV HBM	< 200 pA
TSMC 180nm	5V I/O	> 8 kV HBM	< 5 nA
TowerSemi 350nm	4.5V I/O	> 8 kV HBM	< 100 pA
TowerSemi 350nm	4.5V rail	> 8 kV HBM	< 100 pA

Mainstream CMOS (130nm to 65nm)

Process	Pad	ESD robustness	Leakage
TSMC 130nm	1.2V rail	> 370 V MM	< 50 pA
TSMC 130nm	3.3V rail	> 4.5 kV HBM	< 10 nA
TSMC 130nm	3.3V I/O	> 8 kV HBM	< 1 nA
UMC 130nm	1.2V I/O	> 4 kV HBM	< 10 nA
TSMC 65nm	1.2V rail	> 7 kV HBM	< 1 nA
UMC 65nm	2.5V rail	> 7.5 kV HBM	< 10 nA

Advanced CMOS (40nm to 22nm)

Process	Pad	ESD robustness	Leakage
TSMC 40nm	0.9V I/O	> 5 kV HBM	< 10 pA
TSMC 40nm	1.2V I/O	> 5 kV HBM	< 10 pA
TSMC 40nm	3.3V I/O	> 4 kV HBM	< 500 pA
TSMC 28nm	0.9V I/O	> 8 kV IEC 61000-4-2	< 10 nA
TSMC 22nm	0.8V rail	> 8 kV HBM	< 10 nA
TSMC 22nm	0.8V I/O	> 8 kV HBM	< 10 nA
TSMC 22nm	1.8V rail	> 8 kV HBM	< 10 nA
TSMC 22nm	3.3V rail	> 8 kV HBM	< 10 nA
TSMC 22nm	3.3V I/O	> 8 kV IEC 61000-4-2	< 10 nA

FinFET technology

Process	Pad	ESD robustness	Leakage
TSMC 16nm	1.8V rail	> 4 kV HBM	< 500 pA
TSMC 16nm	1.2V I/O	> 4 kV IEC 61000-4-2	< 50 pA

SOI technology

Process	Pad	ESD robustness	Leakage
GF 22FDX	3.3V rail	> 5 kV HBM	< 10 pA
GF 22FDX	3.3V I/O	> 2 kV HBM	< 500 pA
GF 22FDX	5V rail	> 4 kV HBM	< 10 nA

BiCMOS technology

Process	Pad	ESD robustness	Parasitic capacitance
TSMC 130nm	1.2V I/O	> 4 kV HBM	< 100 fF
TSMC 130nm	1.2V I/O OVT	> 2 kV HBM	< 50 fF
UMC 130nm	1.2V I/O	> 2 kV HBM	< 150 fF
TSMC 90nm	3.3V I/O	> 2kV HBM	< 100 fF
TSMC 65nm	1.8V I/O	> 4 kV HBM	< 100 fF
TSMC 65nm	1.0V I/O	> 3 kV HBM	< 70 fF
GF 65nm	1.2V I/O	> 2 kV HBM	< 50 fF
GF 65nm	3.3V I/O	> 2 kV HBM	< 50 fF

BCD technology

Process	Pad	Holding voltage	ESD robustness	Area
TSMC 250nm BCD	45V I/O	49V	> 5 kV HBM	36800 um²
TSMC 250nm BCD	LIN I/O	27V	> 4 kV HBM	4400 um²
			> 9 kV IEC 61000-4-2	15500 um²
			> 13.5 kV IEC 61000-4-2	29500 um²
UMC 180nm BCD	24V I/O	27V	6.5 kV HBM	44000 um²
TSMC 180nm BCD	18V I/O	23.5V	> 4 kV IEC 61000-4-2	33450 um²
TSMC 180nm BCD	Industrial CAN	25V	> 10 kV HBM	96000 um²
TSMC 180nm BCD	55V I/O	50V	> 4.8 kV IEC 61000-4-2	64500 um²

Other ways to search our IP

Check the benefits for each application type

Browse Sofics IP based on Process technology

Learn about the benefits of Sofics technology

Customer quotes

Specialized ESD design solutions within a very short turnaround time. They truly demonstrated first-time-right delivery capabilities.

Michel De Mey

Senior Director of Hearing and Audio Solutions at AMIS

“Our goal was to boost the robustness of our ESD/EOS protection without making extensive changes to our design masks, so we decided to engage experts in the field. Sofics optimized our product in less than two weeks. Everything worked perfectly. In tests of the chips we found no failure far beyond the required maximum stress voltage, which means there’s headroom even above that.”

Dr. Steffen Buschbeck

Anvo-Systems project manager

“You can’t afford failures in outer space. We chose Sofics because it gives us access to the expertise behind the most advanced technology in ESD diagnostics and solutions, and because they routinely work in multiple processes. This reduces risk and saves time and money.”

Daniel González

leader of the microelectronics group of Arquimea

“The test service provided us with the measurement data to convince our customer of the IC ESD performance. Moreover, the discussions and results are extremely useful in our target for optimizing ESD behavior of our next product family”

Olivier Miallet

Product Engineering Manager, Inside Contactless of France.

“We needed to protect a 15V interface on a 0.18um high-voltage LDMOS chip that we will produce for our customer. The IC contains both the 15V interface and digital logic circuits. Sofics' PowerQubic technology offered a great solution and Sofics delivered it in just two weeks."

Hugh Durdan

eSilicon COO

“Thanks to our close collaboration with TSMC in the IP alliance, Sofics was able to transfer its proprietary ESD portfolio to the most advanced 5nm process technology”

Koen Verhaege

CEO of Sofics

“We have invested in bringing our proprietary ESD portfolio to the most advanced FinFET technology”

Koen Verhaege

CEO of Sofics

“This defines one of our key roles in the IP eco-system: reducing time-to-market and optimizing customer profit by mitigating the risk, expenses and delays of ESD re-design”

Koen Verhaege

CEO of Sofics

“Fabless companies will always benefit from a shorter timeline and a lower cost combined with the confidence of a working solution.”

Koen Verhaege

CEO of Sofics

“With Sofics’ technology, Lantiq’s 130nm and 65nm HP products are more economic for a wide range of chip-hostile environments”

Christoph von Schierstädt

Lantiq Communications Manager

“Sofics’ ESD solutions together with Lantiq’s best-in-class Telecom products thus create a triple-win solution for Sofics, Lantiq and its customers”

Christoph von Schierstädt

Lantiq Communications Manager

“ZMDI needs the best available ESD/EOS protection for our products. Sofics’ PowerQubic clamps were superior in the EMC test, as well as in parameters such as meeting flexible clamping voltage specifications”

Frank Shulze

Business Line Manager, Sensing and Automotive, ZMDI

“We selected Sofics to provide ESD/EOS protection for a new line of 0.18um devices, at a lower cost than building the clamps from scratch.”

Frank Shulze

Business Line Manager, Sensing and Automotive, ZMDI

“We’re used to working in different processes, so we can quickly analyze how an existing ESD design will perform in another process node such as their proprietary SiGe BiCMOS.”

Koen Verhaege

CEO of Sofics

“Integration of overvoltage tolerance with ESD protection delivers both technical and cost benefits”

Koen Verhaege

CEO of Sofics

“When we started development of our newest ICs for SIMs and smartcards we selected Sofics to develop robust, full-chip ESD protection to meet reliability requirements far beyond typical standards, in a foundry process that was new to both of us”

Christian Dupuy

COO of StarChip

“Sofics provided a solution that worked perfectly the first time. There was no need for re-spins, no significant increase in silicon real estate, and no ESD masks or other process extras. This minimized our development time and wafer costs.”

Christian Dupuy

COO of StarChip

“We were able to meet StarChip’s requirements and timeline because the TakeCharge portfolio is highly portable across foundries and easily adapts to provide higher protection and meet specialty ESD requirements”

Koen Verhaege

CEO at Sofics

“We significantly reduced our customer’s cost of development and design, and enabled faster time-to-market.”

Koen Verhaege

CEO at Sofics

“PowerQubic provides cost-effective, cutting-edge IC and system-level protection for high-voltage circuit designs”

Koen Verhaege

CEO at Sofics

“We’re gratified that after extensive testing TSMC has selected our technology to help customers protect their high-voltage circuits.”

Koen Verhaege

CEO at Sofics

“Sofics has been a strong supporter of the drive to improve the reliability of electronics, and has achieved several breakthroughs in ESD protection”

Noboru Shiono

Senior Manager of RCJ

“With the addition of TakeCharge on-chip ESD protection design solutions to the UMC IP Alliance Program, UMC customers will have easy access to superior ESD design solutions from an industry wide recognized leader in its field”

Ken Liou

director of the IP and Design Support Division at UMC

“Our alliance with UMC means that customers will achieve shorter design cycles for proven specialty solutions optimized with advanced ESD protection. Together, Sarnoff and UMC can better meet the specialized needs of our customers by bringing cost efficient, higher-quality solutions to market much faster.”

Koen Verhaege

CEO at Sofics

“Sofics combines IP in an advanced design flow with calculation and integration tools, and customized services. They complement the diverse Design Services offered by our portfolio of DCA partners,”

Tom Quan

Deputy Director at the Design Methodology and Service Marketing at TSMC

"Sofics is excited and honored to cooperate with TSMC. Our mission is to empower customers with advanced solutions and tools so they can independently perform successful ESD design, getting it right the first time, every time, regardless of the complexity of the process, application or innovation."

Koen verhaege

CEO at Sofics

“The TakeCharge Design Kit enabled RedMere to quickly and economically increase our IC ESD performance to a new HDMI industry standard of 8kV HBM without compromising the stringent operation requirements of a 3.4Gbps data channel. They truly demonstrated the ease-of-use and scalability of their solutions”.

Peter Smyth

CEO of RedMere Technology

“RedMere Technology’s selection of TakeCharge to aid in a successful first to-market introduction of their HDMI application proves the trust semiconductor companies have placed in the effectiveness of i-our ESD solutions"

Koen Verhaege

CEO at Sofics

“TakeCharge enables design engineers to access the most advanced on-chip, extreme low-capacity and area efficient ESD solutions."

Koen Verhaege

CEO at Sofics

“As a specialty foundry, it is important that we provide our fabless customers with a wide range of robust and efficient high-performance ESD protection solutions for all their logic and mixed-signal applications"

Dani Ashkenazi

General Manager CMOS Product Line at Tower Semiconductor

"Sofics has consistently been a reliable and expert ESD protection IP partner to the semiconductor industry, making them the natural choice as our partner for these demanding applications.”

Dani Ashkenazi

General Manager CMOS Product Line at Tower Semiconductor

“We are pleased that Tower Semiconductor selected our technology to provide a high quality ESD protection platform. TakeCharge ESD protection solutions are developed with scalability in mind, and thus can meet high-performance requirements, even up to 20kV HBM.”

Koen Verhaege

CEO at Sofics

“System manufacturers are increasingly asking IC suppliers for CDM-protected devices. Based on our previous success with TakeCharge CDM protection solution will help us meet that challenge and further solidify Toshiba's competitive position.”

Naoyuki Shigyo

chief specialist in the Analog CAD Engineering Department of Toshiba’s Semiconductor Company

Toshiba has been using technology based on TakeCharge to protect its CMOS ICs from Human Body Model (HBM) and Machine Model (MM) ESD since 2000. The approach has been applied to high-volume 0.18μm, 0.13μm, and 90nm products.

Naoyuki Shigyo

chief specialist in the Analog CAD Engineering Department of Toshiba’s Semiconductor Company

"... consistently manufacture chips that perform at high voltages with full electrostatic discharge (ESD) and latch-up protection. We have implemented these TakeCharge devices in our various high volume products, such as LCD and OLED driver devices, where they deliver substantial added value for Oki and its customers.”

Mr. Shiratori

Deputy General Manager, Display Driver Division of Oki’s Silicon Solution Company

“TakeCharge technology helps us reduce the die size of our chips for greater economy, while maintaining and ensuring ESD protection in all application areas including high speed”

Shigeo Koguchi

President and CEO of Toshiba’s Semiconductor Company

“We’ve had consistent success in designing more compact, higher-performance ESD protection into our ICs with TakeCharge. We will continue to collaborate with Sarnoff to develop solutions for our future processes such as 45nm and 32nm.”

Naoyuki Shigyo

Chief Specialist, System LSI Design Department of Toshiba’s Semiconductor Company

“Smaller ICs can help LCD display manufacturers meet the cost pressures they face, and also offer an opportunity to develop even more compact designs. Our engineers achieved this breakthrough IC design for our customers just 8 months after we implemented the new technology, with no redesigns required.”

Ryo Ogura

ESD project leader and Managing Director of NJR

“We had faced many ESD problems which could not be solved easily two decades ago, especially on thin gate oxide process. Now, few ESD problems appear in our IC development, thanks to ESD protection technology that has been licensed from Sofics.”

Top-10 Semiconductor company

Director

“We are collaborating with industry-leading IP providers to give our customers access to high-quality IPs. We are pleased to welcome Sofics to our IFS Accelerator IP Alliance”

Suk Lee, VP of Design Ecosystem Development at IFS

Director

“We are collaborating with industry-leading IP providers to give our customers access to high-quality IPs. We look forward to continued collaboration with Sofics to enable our customers to enjoy a proven selection of ESD protection IPs.”

Suk Lee, VP of Design Ecosystem Development at IFS

Director

“We look forward to working with Intel Foundry to support mutual customers with our proprietary ESD technology.”

Koen Verhaege, CEO of Sofics

Director